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MRF89XA
3.11.3.3
Address Based
3.11.3.4
CRC-Based
Address filtering can be enabled through the
ADDFIL<1:0> bits (PKTCREG<2:1>). It adds another
level of filtering above Sync word, which is typically
useful in multi-node networks where a network ID is
shared between all nodes (Sync word) and each node
has its own ID (address).
Three address based filtering options are available:
? ADDFIL = 01 : Received address field is com-
pared with the internal register, NADDSREG. If
they match, the packet is accepted and
processed; otherwise, it is discarded.
? ADDFIL = 10 : Received address field is com-
pared with the internal register, NADDSREG, and
the constant 0x00. If either is a match, the
received packet is accepted and processed; oth-
erwise, it is discarded. This additional check with
a constant is useful for implementing broadcast in
multi-node networks.
? ADDFIL = 11 : Received address field is com-
pared with the internal register, NADDSREG, and
the constants 0x00 and 0xFF. If any of the three
matches, the received packet is accepted and
processed, otherwise it is discarded. These addi-
tional checks with constants are useful for
implementing broadcast commands of all nodes.
Here the received address byte, as part of the pay-
load, is not stripped off the packet and is made
available in the FIFO. In addition, NADDSREG
and ADDFIL<1:0> bits from PKTCREG only apply
to RX. On TX side, if address filtering is expected,
the address byte should be put into the FIFO like
any other byte of the payload.
The CRC check is enabled by setting the CHKCRCEN
bit (PKTCREG<3>). This bit is used for checking the
integrity of the message. A 16-bit CRC checksum is
calculated on the payload part of the packet and is
appended to the end of the transmitted message. The
CRC checksum is calculated on the received payload
and compared to the transmitted CRC. The result of the
comparison is stored in the STSCRCEN bit
(PKTCREG<0>) and an interrupt can also be gener-
ated on IRQ1.
? On the TX side a two byte CRC checksum is cal-
culated on the payload part of the packet and
appended to the end of the message.
? On the RX side the checksum is calculated on the
received payload and compared with the two
checksum bytes received. The result of the com-
parison is stored in the STSCRCEN bit from and
the CRCOK IRQ source (refer to Register 2-14 for
details).
By default, if the CRC check fails, the FIFO is cleared
and no interrupt is generated. This filtering function can
be disabled through the ACFCRC bit (FCRCREG<7>)
and if CRC fails, the FIFO is not cleared and only the
PLREADY interrupt goes high (for more information,
refer to Register 2-14 ). In both the cases, the two CRC
checksum bytes are stripped off by the packet handler
and only the payload is made available in the FIFO.
The CRC is based on the CCITT polynomial as illus-
trated in Figure 3-28 . This implementation also detects
errors due to leading and trailing zeros. For more infor-
mation on CRC polynomial computation in C#, see
Appendix B: “CRC Computation in C# (convertible
to c)”
FIGURE 3-28:
data input
CRC POLYNOMIAL IMPLEMENTATION
CRC Polynomial =X16+ X 12 + X 5 + 1
X 15
X 14
X 13
X 12
X 11
***
X5
X4
***
X0
? 2010–2011 Microchip Technology Inc.
Preliminary
DS70622C-page 85
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